Field Programmable Gate Array (FPGA) is an effective device to realize real- time parallel processing of vast amounts of video data because of the fine-grain reconfigurable structures. This paper presents a kind of parallel processing construction of Sobel edge detection enhancement algorithm, which can quickly get the result of one pixel in only one clock periods. The algorithm is designed with a FPGA chip called XC3S200- 5ft256, and it can process 1024×1024×8 Gray Scale Image successfully. The design can locate the edge of the gray image quickly and efficiently.
KUMAR, B.GOPI CHANDRA and RAJVEE, MOHAMMAD HAYATH
"IMAGE EDGE DETECTION BASED ON FPGA,"
International Journal of Image Processing and Vision Science: Vol. 1
, Article 5.
Available at: https://www.interscience.in/ijipvs/vol1/iss2/5