In this paper we propose double gate transistor i.e. FINFETS circuits. It is the substitute of bulk CMOS that mean without any compromise in fabrication process except one or two changes. Actually bulk CMOS suffers high power consumption and high leakage currents .so we implement a various novel circuits i.e FINFETS logic design style in 32nm technology and analyzing various parameters like power dissipation, delay, frequency are observed in this paper. In here we notice that less power consumption in FINFETS when compared to ordinary bulk CMOS. We also check the other submicron technology compared to that this submicron technology got less power consumption.
Reddy, K. Nagarjuna; Ramanaiah, K.V.; and Sudheer, K .
"CMOS Logic Design with FINFETS Using 32nm TECHNOLOGY,"
International Journal of Instrumentation Control and Automation: Vol. 1
, Article 7.
Available at: https://www.interscience.in/ijica/vol1/iss1/7