This paper presents a new topology of an Analog-to-Digital Converter (ADC), named as Switched Reference ADC (SR-ADC) where the reference voltages are applied through switches. The switched reference voltage concept works with few mutually exclusive switches which are appropriately selecting the reference voltages for comparison with the input signal. This SR-ADC has been implemented using 0.18μm single poly and six metal CMOS technology. The spectra simulation result of this SR-ADC shows an ENOB of ≈3.53 for a 1V peak-to-peak input signal having a frequency of 100MHz while operating at a sampling frequency of 500MHz. The total power consumption is 21.39mW for a single power supply of 1.8V having a core area of ≈253μm*221μm.
PATNAIK, SANTOSH KUMAR and BANERJEE, DR. SWAPNA
"DESIGN OF A 500MHZ, 4-BIT LOW POWER ADC FOR UWB APPLICATION,"
International Journal of Electronics Signals and Systems: Vol. 4
, Article 4.
Available at: https://www.interscience.in/ijess/vol4/iss2/4