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International Journal of Electronics Signals and Systems

Volume 4, Issue 2 (2014)

Articles

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A NOVEL FEATURE EXPANSION ALGORITHM FOR NONRIGID CT/MRI BRAIN IMAGE REGISTRATION
N. HARSHA VARDHAN and S. ASIF HUSSAIN
DOI: 10.47893/IJESS.2014.1199

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DESIGN OF A 500MHZ, 4-BIT LOW POWER ADC FOR UWB APPLICATION
SANTOSH KUMAR PATNAIK and DR. SWAPNA BANERJEE
DOI: 10.47893/IJESS.2014.1202

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AUTONOMOUS RECONFIGURATION OF IP CORE UNITS USING BLRB ALGORITHM
B. HARIKRISHNA and DR.S. RAVI
DOI: 10.47893/IJESS.2014.1203

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MINIATURE IMPROVED CARRY SELECT ADDER WITH ADVANCE FEATURES AND POWER REQUIREMENTS
D. KRISHNA NAIK and DR V. VIJAYALAKSHMI
DOI: 10.47893/IJESS.2014.1205

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CRBBE ALGORITHM FOR LOW POWER AND HIGH SPEED MULTIPLIER DESIGN
K. SANJEEVARAO and A. RAMKUMAR
DOI: 10.47893/IJESS.2014.1206

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DECOUPLING LOGIC BASED SRAM DESIGN FOR POWER REDUCTION IN FUTURE MEMORIES
M. PREMKUMAR and CH. JAYA PRAKASH
DOI: 10.47893/IJESS.2014.1207

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IMPLEMENTATION OF MULTITRACK SIMULATOR IN FPGA FOR ESM SYSTEM
J. MOHAN PRITHVI and D. AJAY KUMAR
DOI: 10.47893/IJESS.2014.1208

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OFFLINE SIGNATURE VERIFICATION BASED ON GLCM
P. NAGENDRA BABU
DOI: 10.47893/IJESS.2014.1209

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