International Journal of Electronics Signals and Systems


In this project a design of application-based adaptable level three-phase diode clamped multilevel voltage source inverter is proposed. The inverter is designed in a fussy manner, that different levels of the inverter can be designed and simulated in a single circuit. Using select input he level switching of inverter is done. A Mat lab/Simulink model of the proposed design is modeled and simulated, with the gating signals generated using FPGA. A Phase opposition disposition sinusoidal PWM (PODSPWM) algorithm is used for generation of gating signals. The harmonic analysis of the output voltage waveform for each levels of inverter is done separately and using proposed model, verified the result. A comparison of total harmonic distortion of different levels of inverter is done. The t o t a l harmonic distortion is very low for higher level inverter. The FPGA implementation of gating signals for the proposed model is done using Xilinx Spartan 3 XCS400PQ208.



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