A 1.2-V 40-mA capacitor-free CMOS low-dropout regulator (LDO) for system-on-chip applications to reduce board space and external pins is presented. By utilizing damping-factor control frequency compensation on the advanced LDO structure, the proposed LDO provides high stability, as well as fast line and load transient responses, even in capacitorfree operation. The proposed LDO has been implemented in a tsmc65nm CMOS technology, and the total error of the output voltage due to line and load variations is less. Moreover, the output voltage can recover with ≈2.3μs for full load current changes. The power-supply rejection ratio at 1 MHz is 26 dB.
SAGAR.K.N, SRIRANGANATHA; N., POORNIMA; and KUMAR.V, VIJAYA
"CAPACITOR-LESS LOW-DROPOUT VOLTAGE REGULATOR,"
International Journal of Electronics and Electical Engineering: Vol. 3
, Article 9.
Available at: https://www.interscience.in/ijeee/vol3/iss1/9