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International Journal of Electronics and Electical Engineering

Volume 3, Issue 1 (2014)

Articles

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VHDL IMPLEMENTATION OF GENETIC ALGORITHM FOR 2-BIT ADDER
VEDAVATHI. A, MEENA. K.V, and GAYATRI MALHOTRA

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LOSSLESS AND LOSSY IMAGE COMPRESSION BASED ON DATA FOLDING
GAYATRI. B. TIGADI and MANJULADEVI T.H.

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CAPACITOR-LESS LOW-DROPOUT VOLTAGE REGULATOR
SRIRANGANATHA SAGAR.K.N, POORNIMA N., and VIJAYA KUMAR.V

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FPGA IMPLEMENTATION OF A DWT AND AES PROCESSOR FOR SECURE IMAGE CODING
SANTHOSH KUMAR R, CYRIL PRASANNA RAJ, Y. MANJULA, and M.Z. KURIAN

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