Article Title

COUNTING BLOOM FILTER ARCHITECTURE IN VLSI NETWORK SYSTEMS

Authors

NAGAMALLI. A, Department of E.C.E, A.I.E.T, Narsipatnam,Visakhapatnam , AndhraPradesh ,IndiaFollow
KEDARESWARARAO. M, Department of E C E,A.I.E.T, Narsipatnam, J. N.T.U.K, Kakinada, IndiaFollow

Abstract

the Counting Bloom Filter (CBF) is useful for real time applications where the time and space efficiency is the main consideration in performing a set membership tests. The CBF estimates whether an element is present in a large array or not by allowing false positives and by not permitting false negatives. In this paper CBF architecture is analyzed and has been implemented. There are two approaches of CBF, SRAM based approach using up/down counters and the LCBF using up/down LFSR unit. In this paper the LCBF architecture discussed and analyzed. In the latest VLSI technology it is easy to fabricate memories that hold a few million bits of data and addresses. But in the recent embedded memory technologies rather than mapping of addresses of 5000 bits of data using hashing functions we can concise in to single contiguous memory.

Recommended Citation

A, NAGAMALLI. and M, KEDARESWARARAO. (2015) "COUNTING BLOOM FILTER ARCHITECTURE IN VLSI NETWORK SYSTEMS," International Journal of Computer and Communication Technology: Vol. 6: Iss. 2, Article 1.
DOI: 10.47893/IJCCT.2015.1278
Available at: https://www.interscience.in/ijcct/vol6/iss2/1

DOI

10.47893/IJCCT.2015.1278